White paper by Stelios Androulidakis

SAE Circuits Colorado, Inc.

Rev b 1-16-15

In today’s digital electronics interference is a big concern, especially when it comes to video, usb interfaces, Ethernet, and other wireless communications. “Noise” in a circuit can result in anything from poor picture quality to a loss or degradation of critical signals.

Every wire and every circuit that transmits electricity has a resulting electromagnetic field around it, surrounding it and affecting the surrounding area. This can actually be felt by a human being near high power lines.  Though circuits on a board do not carry near as much electricity as a high power line, the electromagnetic field is still there, even though it’s a lot weaker. 

In a critical design, the electromagnetic field can interfere with the signal flow in an adjacent circuit (see illustration below). This field can be controlled by the width and height of the circuit, as well as its proximity to a plane layer.


Impedance is measured in Ohms.

A Signle-Ended impedance circuit is one circuit by itself, and the impedance reading concerns  the effect it is having on the surrounding circuitry. This circuit could still be in a group, but it is evaluated independently. A high impedance from a circuit in a sensitive area can interfere with surrounding signals. In the digital world, this can lead to excessive noise or other problems.


In order to have a circuit that will not affect surrounding signals, as a rule of thumb, the distance to the nearest adjacent circuit or feature of any kind must be 20X the circuit width. Since that is not possible in today’s high density designs, the impedance of a circuit can be controlled using a variety of different methods;  from specialty materials with varying Dk values, to varying the distance to a plane layer, which helps absorb excess electromagnetic radiation. Varying the circuit width and height will also have a major effect in the surrounding impedance.

Single –ended impedance can easily be controlled once a baseline is determined. Bringing a plane layer (power or ground) closer to the signal layer lowers the impedance, since more of it is absorbed by the surrounding metal. Similarly, the circuit can be surrounded by a ground plane on the same layer, in order to form what is known as a co-planar  waveguide, in order to achieve the same results. What matters is the distance to ground, and the “dielectric” of the layers the electromagnetic  waves must travel trough in order to get absorbed by the metal.

Since bringing the ground closer lowers the impedance, adding prepreg and increasing the distance to the ground layer will inversely increase the impedance.

Another factor is the total cross-sectional area of the circuit or wire. The height and the width are very critical. As the circuit’s cross-sectional area decreases, the impedance increases. Adversely, as the cross sectional area increases, the impedance decreases. (This is due to the reduced distance ratio to the plane layer, as the cross-sectional area is increased, as long as the power requirement stays the same.)

For example: If I have a circuit that is testing at 60 Ohms and I want it to be 50 Ohms, I can either increase the circuit width while maintaining the same dielectric distance, use heavier copper to increase the circuit height while still maintaining the same dielectric distance, or I can bring the ground plane closer by using a thinner core or less prepreg.

Differential impedance involves two circuits running parallel to each other, and the effect they have on each other’s signals. Even impedance is calculated when the signals are traveling  the same way, and odd impedance is calculated when the signals are running opposite from each other. The Differential is calculated using both the odd and even. Generally, differential impedance is used to match the circuits on a board to the cable it will connect.  For example:

USB cables are a standard twisted pair of wires with 90 Ohm differential impedance. Circuits designed to connect to that usb cable are generally required to be 100 Ohms ±10%; better than the required impedance of the cable. (This is mostly due to the price of cables vs the price of an assembled board.)

Another example is Ethernet, which uses cables of 100 Ohm impedance. The circuits designed to connect to this cable will  generally be 100 Ohms ±10%, while the ethernet cables are ±15%.


Other Uses:  Another reason to pay attention to impedance control becomes obvious when designing time delay circuits, and high speed transimission circuitry. In the case of time delay circuitry, the same 20X width rule of thumb applies, otherwise impedance from a circuit can affect the overall time delay capabilities or degrade the signal altogether.



Having one or two impedance requirements on a board is becoming relatively standard, depending on the connectivity required. This is becoming prevalent on more and more designs.  Each circuit will have an effect on the surrounding area, and with each impedance requirement, the margin of error increases. It is not uncommon for us here at SAE Circuits to build a 16 layer board with a single ended 50 Ohm controlled impedance on each signal layer along with 90 Ohm USB and 100 Ohm Ethernet circuits on those same layers. Needless to say, precision is the key to success. A need for speed can and will only hinder this demanding process.

Another major factor in the success of controlling the impedance of a circuit (or any conductor for that matter) is the size. The larger the circuit, the easier it is to control the impedance in a production environment.  It is relatively easy and repeatable  to control an etched circuit to ± 0.5 mil width. This is relatively easy to process in a production environment, and repeatability is 100% when your board is designed to have 12 mil circuits. When the circuitry is reduced to 4 mils or less, though, controlling the circuit width to ± 0.5 mil is no longer acceptable. This is due to the fact that the requirement is in a % ratio. (0.5 mil is 12.5% of a 4 mil circuit, when it is only 4.2% of a 12 mil circuit.)

This thinner the circuitry the more demanding the manufacturing process. Tolerances can drop below the point where it is no longer physically possible to control the width of a circuit. If the required circuitry gets small enough, the edge of the circuit itself becomes a factor.

Examples are shown below:

Circuit Width & space of 100 Ohm Differential Pair

Controlled to ± 0.001” Standard Imaging/Etching

Controlled to ± 0.0005” VFL Process

Controlled to ± 0.00025” VFL Process with LDI


±8.3% of circuit width 0.011”-0.013”             95-105 Ohms            (±5% deviation)

±4.2% of circuit width   0.0115” – 0.0125”    97.5-102.5 Ohms (±2.5% deviation)

±2.1% of circuit width   0.001175”-9.001225”   98.75-101.25 Ohms (±1.25% deviation)


±14.3% of circuit width   0.006”-0.008”             91-109 Ohms           (±9% deviation)

±7.2% of circuit width   0.0065”-0.0075”     95.5-104.5 Ohms     (±4.5% deviation)

±3.6% of circuit width   0.00675”-0.00725”     97.75-102.25 Ohms   (±2.5% deviation)


25% of circuit width   0.003”-0.005”             84-116 Ohms         (±16% deviation)

12.5% of circuit width   0.0035”-0.0045”          92-108 Ohms            (±8% deviation)

6.3% of circuit width   0.00375”-0.00425”     96-104 Ohms            (±4% deviation)


As shown by the previous chart,  it is advantageous to design a 7 mil controlled impedance circuit over  a 4 mil for repeatability and manufacturability. Tolerances can become unbearable and unmanufacturable as circuitry is miniaturized.  Though there is a small amount of gained real estate, the resulting additional processing required to meet a ±10% differential impedance specification at this circuit width will become cost prohibitive.

Etching using standard methods is usually controlled to within ½ mil on ½ oz copper. This effect can be cumulative between imaging and etching, so tight controls and measurements after all processing steps are key to achieving a successfull controlled impedance design in a finished product.

For any questions, suggestions, or clarifications regarding this document, feel free to contact:                      Stelios Androulidakis, Process Engineering,  SAE Circuits Colorado, Inc. at (303) 530-1900 ext 153 or 109 or

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